Overclocking

So far, I’ve tested several Ryzen 3000 series CPUs. Each of them has a wall of about 4.3GHz or 4.2GHz on their good CCD or chiplet. Some call it the golden chiplet. The worse chiplet, is often equated with feces and is known to be of lesser quality in two CCD CPU’s. However, the Ryzen 5 3600X only has one CCD. However, within a CCD, one CCX can be weaker than the other. This CPU doesn’t seem to operate that way as all of its cores can do 4.3GHz at the very least. However, this only occurred when using PB2 or PBO.

Manual overclocking proved to be largely a fruitless endeavor. For some reason, anytime I set the CPU’s turbo frequency or voltage values manually, it would lock the CPU at 500MHz. It wouldn’t increase the clocks no matter what I did, which resulted in a painfully slow system. I can only conclude this is weirdness from the MSI MEG X570 GODLIKE, as it’s had the inverse behavior using PBO on the 3900X where it would remain locked at 3.5GHz, no matter what. That’s allot better than 500MHz, but the same basic frequency locking behavior was observed. I will have to follow up with MSI on this as I am not sure why this is behaving that way. In any case, manual overclocking was effectively a no go on this particular board. This is also odd as this is the motherboard that I’ve generally had the best luck with as far as boost clocks go.

However, using PBO was actually fruitful. Although the clocks never broke 4.4GHz, they held longer which equals more performance. Lastly, this CPU’s memory controller worked better than most as this CPU will post with the TridentZ Royal DDR4 3600MHz modules at DDR4 4000MHz and hold their default timings. This was something that was set by accident and it worked. My other Ryzen 3000 series test CPU’s would not POST with that RAM at 4000MHz leading me to erroneously conclude that the RAM couldn’t do that. This particular sample seems to have a very strong memory controller. I can’t guarantee that it will be your experience. This could also be chalked up to improving BIOS revisions and newer AGESA code, which often tackles memory compatibility and performance.