Rumors, leaks, and official announcements are beginning to pick up pace for AMD’s next round of products as Computex 2025 approaches. From a GRE edition of the Radeon 9070 to the Radeon RX 9060 XT series launch and then the highly anticipated Zen6 Medusa processors, there’s plenty on the horizon for Team Red, not to mention the new EPYC Zen6 “Venice” datacenter processor. In other news, fans of Hogwarts Legacy should be on the lookout as FSR 3 is finally getting added in an upcoming update.
AMD Radeon RX 9060 XT
NVIDIA just debuted its RTX 5060 series with the launch of the RTX 5060 Ti 16 GB, and not without a small amount of controversy, so folks are obviously looking to the other side of the fence for what AMD has in store. Rumors for its Radeon RX 9060 XT are increasing, with the latest being that AMD is planning its launch two weeks after Computex 2025 (which happens from May 19-23). Among the other rumors are that these upcoming RDNA4-based GPUs will also be launched in two memory configurations featuring either 8 GB or 16 GB GDDR6 memory running at 20 Gbps (vs 18 Gbps of RDNA3). Given the oddity of NVIDIA’s recent decisions with its two variants for the RTX 5060 Ti, it wouldn’t come as a complete surprise if AMD abandons this strategy or prices its 8GB offer at a very low competitive price. A Navi 44 GPU is believed to power these cards, which might be clocked as much as 700 MHz higher than the Navi 48 RX 9070 XT.
AMD Radeon RX 9070 GRE
VideoCardz has obtained specs for the Radeon RX 9070 GRE. If accurate, spec-wise it will sit between the aforementioned RX 9060 XT and RX 9070, and is also expected to launch sometime in Q2 2025, but it remains unknown if it will get a global release. One of the more interesting details for this card is it wil reportedly feature 12 GB GDDR6 memory on a 192-bit bus running at 18 Gbps.
- Cores: 3,072
- Boost Clock: ~2.79 GHz
- Memory Configuration: 12 GB GDDR6, 192-bit, 18 Gbps, 432 GB/s
- PCIe Interface: PCIe 5.0×16
Zen 6-Based Ryzen “Medusa” CPU
For consumers, this might be something many are keeping an eye out for. For some time now, AMD has maxed out at 8 cores/16 threaded CCDs with its consumer products, but Medusa is rumored to shake things up a bit. The Zen6-based CPUs are a ways off, but aside from increased potential core counts of 12, 24, and 32, they could also feature up to 128 MB L3 cache. Per WccfTech (1, 2), these processors may also introduce a new IMC (integrated memory controller) that switches the memory orientation slots from A0/B0 to A1/B1.
EPYC “Venice” Datacenter processors taped out
Lastly, this tidbit is more about AMD’s next line of EPYC datacenter processors, but hope exists that the Zen6-based “Venice” architecture makes its way to consumer, albeit HEDT, PCs. AMD CEO Dr. Li Su joined TSMC CEO Dr. C.C. Wei in celebrating that the EPYC “Venice” has been taped out utilizing TSMC’s N2 node process.
We're proud of our deep partnership with TSMC, and we know the need for compute will continue to grow, which is why we're excited to announce several updates… 🧵 pic.twitter.com/QM4FUZuVZ4
— AMD (@AMD) April 14, 2025
Per Press Release:
“TSMC has been a key partner for many years and our deep collaboration with their R&D and manufacturing teams has enabled AMD to consistently deliver leadership products that push the limits of high-performance computing,” said Dr. Lisa Su, chair and CEO, AMD. “Being a lead HPC customer for TSMC’s N2 process and for TSMC Arizona Fab 21 are great examples of how we are working closely together to drive innovation and deliver the advanced technologies that will power the future of computing.”
“We are proud to have AMD be a lead HPC customer for our advanced 2nm (N2) process technology and TSMC Arizona fab,” said TSMC Chairman and CEO Dr. C.C. Wei. “By working together, we are driving significant technology scaling resulting in better performance, power efficiency and yields for high-performance silicon. We look forward to continuing to work closely with AMD to enable the next era of computing.”