As if 5 nm, 4 nm, 3 nm, and 2 nm wasn’t enough, we are now hearing that TSMC plans to debut an improved version of its 3 nm manufacturing process in 2023. The news comes from DigiTimes’ sources, which claims that the first customer will be none other than Apple.
“TSMC plans to launch an enhanced version of 3nm process technology in 2023, with Apple being the initial customer adopting the process,” industry sources said.
While 3 nm+ will undoubtedly be better than the original, it isn’t clear at this point what kind of specific improvements (e.g., reduced power consumption) the plus version might entail. What we do know is that TSMC’s 3 nm process will leverage FinFET technology once again and feature an increase in density that’s equally as impressive as previous generations.
“In terms of density, TSMC says N3 will be another full node stride over N5 with a density improvement of 1.7x over N5,” WikiChip wrote back in April.
“Going based on [TSMC CEO C.C.] Wei’s word, our initial estimates for the N3 is that it will offer a cell-level density of just under 300 million transistors per millimeter square. Once we’re able to fully confirm the N5 node density, a more accurate density prediction of the N3 node will be possible.”
The article goes on to confirm that the 3 nm manufacturing process will provide a 10 to 15 percent improvement in performance, as well as a 25 to 30 percent reduction in power consumption at ISO speed.