Naming convention, and nomenclature, can potentially affect the successful marketing of products and product lines. Head of Marketing Godfrey Cheng of Taiwan Semiconductor Manufacturing Company recently spoke about this dynamic. As a guest on AMD’s ‘Meet the Experts‘ he goes into some detail regarding the current node naming convention.
The current path
TSMC is well known for leading the race for the incredible shrinking die. Their node process has helped propel AMD back to for forefront of the consumer market. AMD’s current Ryzen and Navi product lines both use TSMC’s 7nm or N7 nodes. The next increment will be 5nm, or N5, and then 3nm, or N3. Samsung recently announced they’ve begun producing a 3nm node. Obviously we’ll soon hit a point where this naming convention will no longer work. However it seems that this standard is not as accurate of a descriptor as it would seem. Mr. Cheng explained that this has been the case since nodes were at the 0.35 micron level. He goes on to elaborate that the current descriptor does not accurately represent the physical transistor density.
Godfrey Cheng is not alone in this observation. Intel has spoken up about this numerous times. PCGamesN noted one such blog post from 2017. In that post Mark Bohr referenced Moore’s Law and its relation to the industry standard. He notes the current practice simply names by 0.7 times smaller such as 90nm, 65nm, 45nm, etc. This practice is used even when a particular manufacturer does not indeed have said transistor density. Both share the opinion that the current naming convention does not require manufacturers to accurately describe the architecture or transistor density. In turn it prevents customers from being able to easily identify unique processes of each node. Intel has proposed going to a transistor naming density formula instead.