Image: AMD

AMD’s upcoming Zen 4-based Ryzen 6000 series processors will reportedly max out at 16 cores. This is according to hardware leaker ExecutableFix, who suggested via a tweet today that the flagship “Raphael” chip will likely be limited to 16 cores. This would put it in line with red team’s current mainstream desktop flagship, the Ryzen 9 5950X, which leverages 16 cores and 32 threads. According to another leaker, Patrick Schur, AMD’s Zen 4-based Ryzen 6000 series processors will also feature TDPs of up to 170 watts.

AMD Raphael series is based on TSMC 5nm fabrication node. Those supposedly AMD Ryzen 6000 series processors will be the first to support DDR5 memory and the first to feature a brand new IHS design for LGA1718 based socket codenamed AM5. Previous rumors have suggested that Raphael might debut around the second and third quarter of next year, which suggests it will compete with Alder Lake-S successor codenamed Raptor Lake.

Sources: ExecutableFix, Patrick Schur, VideoCardz

Don’t Miss Out on More FPS Review Content!

Our weekly newsletter includes a recap of our reviews and a run down of the most popular tech news that we published.

Join the Conversation

5 Comments

  1. Hmm. The current 16-core is 105W. I hope AMD isn’t about to pull an Intel and crank the TDP, or change the definition of TDP, for some marginal gain.

  2. [QUOTE=”Brian_B, post: 37683, member: 96″]
    Hmm. The current 16-core is 105W. I hope AMD isn’t about to pull an Intel and crank the TDP, or change the definition of TDP, for some marginal gain.
    [/QUOTE]
    A 60% increase in power usage would be okay if they could get around 60% more performance, yet I doubt that that’s really possible. Still, if it were on the order of say 30% for the top-end part, while the ‘tamer’ parts run more efficiently, it wouldn’t be a loss IMO.

    [QUOTE=”Uvilla, post: 37686, member: 397″]
    16 core per?
    [/QUOTE]
    Since they’re talking specifically about ‘Ryzen’ releases of Zen 4, it should mean ’16 cores per socket’. It’d certainly be interesting if they were coming along with 16-core CCDs, which should theoretically be possible as far as physically fitting the logic into the socket and allowing 32-cores if using the current dual-CCD + cache/uncore die configuration, but I think we’re not quite ready for that.

    Such a product would be much easier to support in TR packaging IMO, from sheer socket size for heat dissipation to memory channels for memory bandwidth to more memory and connectivity overall so that those cores actually have work to [I]do[/I]!

  3. The statement that these top out at 16 cores has nothing to do with future Epyc or Threadripper parts and how many cores they’ll have.

Leave a comment